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1 pc charge injection, 100 pa leakage, cmos, 5 v/+5 v/+3 v, quad spst switches adg611/adg612/adg613 rev. a information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2002C2009 analog devices, inc. all rights reserved. features 1 pc charge injection 2.7 v to 5.5 v dual-supply operation +2.7 v to +5.5 v single-supply operation automotive temperature range: ?40c to +125c 100 pa maximum at 25c leakage currents 85 on resistance rail-to-rail switching operation fast switching times 16-lead tssop and soic packages typical power consumption: <0.1 w ttl-/cmos-compatible inputs applications automatic test equipment data acquisition systems battery-powered systems communications systems sample-and-hold systems audio signal routing relay replacement avionics functional block diagram notes 1. switches shown for a logic 1 input. in1 in2 in 3 in4 s1 d1 s2 d2 s3 d3 s4 d4 adg611 in1 in2 in3 in4 s1 d1 s2 d2 s3 d3 s4 d4 adg612 in1 in2 in3 in4 s1 d1 s2 d2 s3 d3 s4 d4 adg613 02753-001 figure 1. general description the adg611/adg612/adg613 are monolithic cmos devices containing four independently selectable switches. these switches offer ultralow charge injection of 1 pc over the full input signal range and typical leakage currents of 10 pa at 25c. the devices are fully specified for 5 v, +5 v, and +3 v supplies. each contains four independent single-pole, single-throw (spst) switches. the adg611 and adg612 differ only in that the digital control logic is inverted. the adg611 switches are turned on with a logic low on the appropriate control input, whereas a logic high is required to turn on the switches of the adg612. the adg613 contains two switches with digital control logic similar to that of the adg611 and two switches in which the logic is inverted. each switch conducts equally well in both directions when on and has an input signal range that extends to the supplies. the adg613 exhibits break-before-make switching action. the adg611/adg612/adg613 are available in a small, 16-lead tssop package, and the adg611 is also available in a 16-lead soic package. product highlights 1. ultralow charge injection (1 pc typically). 2. dual 2.7 v to 5.5 v or single +2.7 v to +5.5 v operation. 3. automotive temperature range: ?40c to +125c. 4. small, 16-lead tssop and soic packages.
adg611/adg612/adg613 rev. a | page 2 of 16 table of contents features .............................................................................................. 1 ? applications ....................................................................................... 1 ? functional block diagram .............................................................. 1 ? general description ......................................................................... 1 ? product highlights ........................................................................... 1 ? revision history ............................................................................... 2 ? specifications ..................................................................................... 3 ? dual-supply operation ............................................................... 3 ? single-supply operation ............................................................. 4 ? absolute maximum ratings ............................................................6 ? esd caution...................................................................................6 ? pin configuration and function descriptions ..............................7 ? typical performance characteristics ..............................................8 ? terminology .................................................................................... 10 ? test circuits ..................................................................................... 11 ? applications information .............................................................. 13 ? outline dimensions ....................................................................... 14 ? ordering guide .......................................................................... 14 ? revision history 11/09rev. 0 to rev. a changes to analog signal range parameter and to on resistance, r on parameter, table 1 .......................... 3 change to digital input capacitance, c in parameter, table 2 .... 4 changes to table 4 and to absolute maximum ratings section ...... 6 added table 5; renumbered sequentially .................................... 7 updated outline dimensions ....................................................... 14 changes to ordering guide .......................................................... 14 1/02revision 0: initial version
adg611/adg612/adg613 rev. a | page 3 of 16 specifications dual-supply operation v dd = +5 v 10%, v ss = ?5 v 10%, gnd = 0 v, unless otherwise noted. table 1. parameter +25c ?40c to +85c ?40c to +125c 1 unit test conditions/comments analog switch analog signal range v ss to v dd v on resistance, r on 85 typ v s = 3 v, i s = ?1 ma; see figure 14 115 140 160 max v s = 3 v, i s = ?1 ma; see figure 14 on-resistance match between channels, r on 2 typ v s = 3 v, i s = ?1 ma 4 5.5 6.5 max v s = 3 v, i s = ?1 ma on-resistance flatness, r flat(on) 25 typ v s = 3 v, i s = ?1 ma 40 55 60 max v s = 3 v, i s = ?1 ma leakage currents v dd = +5.5 v, v ss = ?5.5 v source off leakage, i s(off) 0.01 na typ v d = 4.5 v, vs = + 4.5 v; see figure 15 0.1 0.25 2 na max v d = 4.5 v, vs = + 4.5 v; see figure 15 drain off leakage, i d(off) 0.01 na typ v d = 4.5 v, v s = + 4.5 v; see figure 15 0.1 0.25 2 na max v d = 4.5 v, v s = + 4.5 v; see figure 15 channel on leakage, i d(on) , i s(on) 0.01 na typ v d = v s = 4.5 v; see figure 16 0.1 0.25 6 na max v d = v s = 4.5 v; see figure 16 digital inputs input high voltage, v inh 2.4 v min input low voltage, v inl 0.8 v max input current, i inl or i inh 0.005 a typ v in = v inl or v inh 0.1 a max v in = v inl or v inh digital input capacitance, c in 2 pf typ dynamic characteristics 2 t on 45 ns typ r l = 300 , c l = 35 pf, v s = 3.0 v; see figure 17 65 75 90 ns max r l = 300 , c l = 35 pf, v s = 3.0 v; see figure 17 t off 25 ns typ r l = 300 , c l = 35 pf, v s = 3.0 v; see figure 17 40 45 50 ns max r l = 300 , c l = 35 pf, v s = 3.0 v; see figure 17 break-before-make time delay, t bbm 15 ns typ r l = 300 , c l = 35 pf, v s1 = v s2 = 3.0 v; see figure 18 10 ns min r l = 300 , c l = 35 pf, v s1 = v s2 = 3.0 v; see figure 18 charge injection ?0.5 pc typ v s = 0 v, r s = 0 , c l = 1 nf; see figure 19 off isolation ?65 db typ r l = 50 , c l = 5 pf, f = 10 mhz; see figure 20 channel-to-channel crosstalk ?90 db typ r l = 50 , c l = 5 pf, f = 10 mhz; see figure 21 ?3 db bandwidth 680 mhz typ r l = 50 , c l = 5 pf; see figure 22 c s(off) 5 pf typ f = 1 mhz c d(off) 5 pf typ f = 1 mhz c d(on) , c s(on) 5 pf typ f = 1 mhz power requirements v dd = +5.5 v, v ss = ?5.5 v i dd 0.001 a typ digital inputs = 0 v or 5.5 v 1.0 a max digita l inputs = 0 v or 5.5 v i ss 0.001 a typ digital inputs = 0 v or 5.5 v 1.0 a max digita l inputs = 0 v or 5.5 v 1 the temperature range for the y version is ? 40c to +125c. 2 guaranteed by design; not subject to production test.
adg611/adg612/adg613 rev. a | page 4 of 16 single-supply operation v dd = 5 v 10%, v ss = 0 v, gnd = 0 v, unless otherwise noted. table 2. parameter +25c ?40c to +85c ?40c to +125c 1 unit test conditions/comments analog switch analog signal range 0 to v dd v on resistance, r on 210 typ v s = 3.5 v, i s = ?1 ma; see figure 14 290 350 380 max v s = 3.5 v, i s = ?1 ma; see figure 14 on-resistance match between channels, r on 3 typ v s = 3.5 v, i s = ?1 ma 10 12 13 max v s = 3.5 v, i s = ?1 ma leakage currents v dd = 5.5 v source off leakage, i s(off) 0.01 na typ v s = 1 v/4.5 v, v d = 4.5 v/1 v; see figure 15 0.1 0.25 2 na max v s = 1 v/4.5 v, v d = 4.5 v/1 v; see figure 15 drain off leakage, i d(off) 0.01 na typ v s = 1 v/4.5 v, v d = 4.5 v/1 v; see figure 15 0.1 0.25 2 na max v s = 1 v/4.5 v, v d = 4.5 v/1 v; see figure 15 channel on leakage, i d(on) , i s(on) 0.01 na typ v s = v d = 1 v or 4.5 v; see figure 16 0.1 0.25 6 na max v s = v d = 1 v or 4.5 v; see figure 16 digital inputs input high voltage, v inh 2.4 v min input low voltage, v inl 0.8 v max input current, i inl or i inh 0.005 a typ v in = v inl or v inh 0.1 a max v in = v inl or v inh digital input capacitance, c in 2 pf typ dynamic characteristics 2 t on 70 ns typ r l = 300 , c l = 35 pf, v s = 3.0 v; see figure 17 100 130 150 ns max r l = 300 , c l = 35 pf, v s = 3.0 v; see figure 17 t off 25 ns typ r l = 300 , c l = 35 pf, v s = 3.0 v; see figure 17 40 45 50 ns max r l = 300 , c l = 35 pf, v s = 3.0 v; see figure 17 break-before-make time delay, t bbm 25 ns typ r l = 300 , c l = 35 pf, v s1 = v s2 = 3.0 v; see figure 18 10 ns min r l = 300 , c l = 35 pf, v s1 = v s2 = 3.0 v; see figure 18 charge injection 1 pc typ v s = 0 v, r s = 0 , c l = 1 nf; see figure 19 off isolation ?62 db typ r l = 50 , c l = 5 pf, f = 10 mhz; see figure 20 channel-to-channel crosstalk ?90 db typ r l = 50 , c l = 5 pf, f = 10 mhz; see figure 21 ?3 db bandwidth 680 mhz typ r l = 50 , c l = 5 pf; see figure 22 c s(off) 5 pf typ f = 1 mhz c d(off) 5 pf typ f = 1 mhz c d(on) , c s(on) 5 pf typ f = 1 mhz power requirements v dd = 5.5 v i dd 0.001 a typ digital inputs = 0 v or 5.5 v 1.0 a max digita l inputs = 0 v or 5.5 v 1 the temperature range for the y version is ? 40c to +125c. 2 guaranteed by design; not subject to production test.
adg611/adg612/adg613 rev. a | page 5 of 16 v dd = 3 v 10%, v ss = 0 v, gnd = 0 v, unless otherwise noted. table 3. parameter +25c ?40c to +85c ?40c to +125c 1 unit test conditions/comments analog switch analog signal range 0 to v dd v on resistance, r on 380 420 460 typ v s = 1.5 v, i s = ?1 ma; see figure 14 leakage currents v dd = 3.3 v source off leakage, i s(off) 0.01 na typ v s = 1 v/3 v, v d = 3 v/1 v; see figure 15 0.1 0.25 2 na max v s = 1 v/3 v, v d = 3 v/1 v; see figure 15 drain off leakage, i d(off) 0.01 na typ v s = 1 v/3 v, v d = 3 v/1 v; see figure 15 0.1 0.25 2 na max v s = 1 v/3 v, v d = 3 v/1 v; see figure 15 channel on leakage, i d(on) , i s(on) 0.01 na typ v s = v d = 1 v or 3 v; see figure 16 0.1 0.25 6 na max v s = v d = 1 v or 3 v; see figure 16 digital inputs input high voltage, v inh 2.0 v min input low voltage, v inl 0.8 v max input current, i inl or i inh 0.005 a typ v in = v inl or v inh 0.1 a max v in = v inl or v inh digital input capacitance, c in 2 pf typ dynamic characteristics 2 t on 130 ns typ r l = 300 , c l = 35 pf, v s = 2 v; see figure 17 185 230 260 ns max r l = 300 , c l = 35 pf, v s = 2 v; see figure 17 t off 40 ns typ r l = 300 , c l = 35 pf, v s = 2 v; see figure 17 55 60 65 ns max r l = 300 , c l = 35 pf, v s = 2 v; see figure 17 break-before-make time delay, t bbm 50 ns typ r l = 300 , c l = 35 pf, v s1 = v s2 = 2 v; see figure 18 10 ns min r l = 300 , c l = 35 pf, v s1 = v s2 = 2 v; see figure 18 charge injection 1.5 pc typ v s = 0 v, r s = 0 , c l = 1 nf; see figure 19 off isolation ?62 db typ r l = 50 , c l = 5 pf, f = 10 mhz; see figure 20 channel-to-channel crosstalk ?90 db typ r l = 50 , c l = 5 pf, f = 10 mhz; see figure 21 ?3 db bandwidth 680 mhz typ r l = 50 , c l = 5 pf; see figure 22 c s(off) 5 pf typ f = 1 mhz c d(off) 5 pf typ f = 1 mhz c d(on) , c s(on) 5 pf typ f = 1 mhz power requirements v dd = 3.3 v i dd 0.001 a typ digital inputs = 0 v or 3.3 v 1.0 a max digita l inputs = 0 v or 3.3 v 1 the temperature range for the y version is ? 40c to +125c. 2 guaranteed by design; not subject to production test.
adg611/adg612/adg613 rev. a | page 6 of 16 absolute maximum ratings t a = 25c, unless otherwise noted table 4. parameter rating v dd to v ss 13 v v dd to gnd ?0.3 v to +6.5 v v ss to gnd +0.3 v to ?6.5 v analog inputs 1 v ss ? 0.3 v to v dd + 0.3 v digital inputs 1 gnd ? 0.3 v to v dd + 0.3 v or 30 ma, whichever occurs first peak current, s or d 20 ma (pulsed at 1 ms, 10% duty cycle maximum) continuous current, s or d 10 ma 3 v operation 85c to 125c 7.5 ma operating temperature range automotive (y version) ?40c to +125c storage temperature range ?65c to +150c junction temperature 150c ja thermal impedance 16-lead tssop 150.4c/w 16-lead soic, 4-layer board 80.6c/w lead soldering lead temperature, soldering (10 sec) 300c ir reflow, peak temperature (<20 sec) 220c (pb-free) soldering reflow, peak temperature 260(+0/?5)c time at peak temperature 20 sec to 40 sec 1 overvoltages at in, s, or d are clamp ed by internal diodes. the current should be limited to the maximum ratings given. stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. only one absolute maximum rating can be applied at any one time. esd caution
adg611/adg612/adg613 rev. a | page 7 of 16 pin configuration and fu nction descriptions adg611/ adg612/ adg613 top view (not to scale) 1 in1 2 d1 3 s1 4 v ss 5 gnd 6 s4 7 d4 8 in4 16 15 14 13 12 11 10 9 in2 d2 s2 v dd nc s3 d3 in3 nc = no connect 0 2753-002 figure 2. pin configuration table 5. pin function descriptions pin no. mnemonic description 1 in1 switch 1 digital control input. 2 d1 drain terminal of switch 1. can be an input or output. 3 s1 source terminal of switch 1. can be an input or output. 4 v ss most negative power supply terminal. tie this pin to gnd when using the device with single-supply voltages. 5 gnd ground (0 v) reference. 6 s4 source terminal of switch 4. can be an input or output. 7 d4 drain terminal of switch 4. can be an input or output. 8 in4 switch 4 digital control input. 9 in3 switch 3 digital control input. 10 d3 drain terminal of switch 3. can be an input or output. 11 s3 source terminal of switch 3. can be an input or output. 12 nc not internally connected. 13 v dd most positive power supply terminal. 14 s2 source terminal of switch 2. can be an input or output. 15 d2 drain terminal of switch 2. can be an input or output. 16 in2 switch 2 digital control input. table 6. adg611/adg612 truth table adg611 input adg612 input switch condition 0 1 on 1 0 off table 7. adg613 truth table logic switch 1, switch 4 switch 2, switch 3 0 off on 1 on off
adg611/adg612/adg613 rev. a | page 8 of 16 typical performance characteristics 250 0 50 100 150 200 ?5?4?3?2?1012345 on resistance ( ? ) v d , v s (v) t a = 25c 3.3v 4.5v 5.5v 5.0v 2.7v 3.0v 02753-003 600 500 400 300 200 100 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 on resistance ( ? ) v d , v s (v) v dd = 5v v ss = 0v +125c +85c +25c ?40c 02753-006 figure 3. on resistance vs. v d (v s ), dual supplies figure 6. on resistance vs. v d (v s ) for various temperatures, single supply 600 500 400 300 200 100 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 on resistance ( ? ) v d , v s (v) t a = 25c v ss = 0v v dd = 2.7v v dd = 3.0v v dd = 3.3v v dd = 4.5v v dd = 5.0v 02753-004 2 1 0 ?1 ?2 ?3 ?4 ?5 ?6 0 20406080100120 leakage current (na) temperature (c) v dd = +5v v ss = ?5v i s(off) i d(off) i s(on), i d(on) 02753-007 figure 4. on resistance vs. v d (v s ), single supply figure 7. leakage current vs. temperature, dual supplies 250 0 50 100 150 200 ?5?4?3?2?1012345 on resistance ( ? ) v d , v s (v) v dd = +5v v ss = ?5v +125c +85c ?40c +25c 02753-005 2 1 0 ?1 ?2 ?3 ?4 ?5 ?6 0 20406080100120 leakage current (na) temperature (c) v dd = 5v v ss = 0v i s(off) i d(off) i s(on), i d(on) 02753-008 figure 5. on resistance vs. v d (v s ) for various temperatures, dual supplies figure 8. leakage current vs. temperature, single supply
adg611/adg612/adg613 rev. a | page 9 of 16 2.0 ?2.0 ?1.5 ?1.0 ?0.5 0 0.5 1.0 1.5 ?5?4?3?2?1012345 q inj (pc) v s (v) t a = 25c v dd = +3v v ss = 0v v dd = +5v v ss = 0v v dd = +5v v ss = ?5v 02753-009 figure 9. charge injection vs. source voltage 120 100 80 60 40 20 0 ?40 0?20 20 40 60 80 100 120 time (ns) temperature (c) t on , v dd = +5v v ss = 0v t on , v dd = +5v v ss = ?5v t off , v dd = +5v v ss = 0v t off , v dd = +5v v ss = ?5v 02753-010 figure 10. t on /t off times vs. temperature 0 ?2 ?4 ?6 ?8 ?10 ?12 ?14 ?16 ?18 0.3 1k 100 10 1 attenuation (db) frequency (mhz) t a = 25c v dd = ?5v v ss = +5v v dd = +5v v ss = 0v 02753-011 figure 11. on response vs. frequency 0 ?10 ?20 ?30 ?40 ?50 ?60 ?70 ?80 ?90 0.3 1k 100 10 1 off isolation (db) frequency (mhz) v dd = ?5v v ss = +5v t a = 25c 02753-012 figure 12. off isol ation vs. frequency 0 ?10 ?20 ?30 ?40 ?50 ?60 ?70 ?80 ?100 ?90 0.3 1k 100 10 1 crosstalk (db) frequency (mhz) v dd = +5v v ss = ?5v t a = 25c 02753-013 figure 13. crosstalk vs. frequency
adg611/adg612/adg613 rev. a | page 10 of 16 terminology v dd most positive power supply potential. v ss most negative power supply potential. i dd positive supply current. i ss negative supply current. gnd ground (0 v) reference. s source terminal. can be an input or output. d drain terminal. can be an input or output. in logic control input. v d (v s ) analog voltage on terminal d and terminal s. r on ohmic resistance between terminal d and terminal s. r on on-resistance match between any two channels, that is, r onmax ? r onmin . r flat(on) flatness is defined as the difference between the maximum and minimum value of on resistance as measured over the specified analog signal range. i s(off) source leakage current with the switch off. i d(off) drain leakage current with the switch off. i d(on) , i s(on) channel leakage current with the switch on. v inl maximum input voltage for logic 0. v inh minimum input voltage for logic 1. i inl , i inh input current of the digital input. c s(off) off switch source capacitance. measured with reference to ground. c d(off) off switch drain capacitance. measured with reference to ground. c d(on) , c s(on) on switch capacitance. measured with reference to ground. c in digital input capacitance. t on delay between applying the digital control input and the output switching on (see figure 17 ). t off delay between applying the digital control input and the output switching off (see figure 17 ). charge injection a measure of the glitch impulse transferred from the digital input to the analog output during switching. off isolation a measure of unwanted signal coupling through an off switch. crosstalk a measure of unwanted signal that is coupled through from one channel to another as a result of parasitic capacitance. on response frequency response of the on switch. insertion loss loss due to the on resistance of the switch.
adg611/adg612/adg613 rev. a | page 11 of 16 test circuits i ds v1 sd v s r on = v1/i ds 02753-014 figure 14. on resistance sd v s v d i s(off) i d(off) a a 02753-015 figure 15. off leakage sd v d i d(on) a nc nc = no connect 0 2753-016 figure 16. on leakage v dd v ss v dd v ss 0.1f 0.1f gnd t on t off r l 300 ? c l 35pf v s in sd 50% 50% 90% 90% 50% 50% v out v out v in v in adg612 adg611 02753-017 figure 17. switching times v dd v ss v dd 0.1f 0.1f v ss v s1 v s2 v in in1, in2 s1 d1 gnd s2 d2 adg613 50% 50% 90% 90% 90% 90% t bbm t bbm 0v 0v 0v r l1 300 ? c l1 35pf r l2 300 ? c l2 35pf v out1 v in v out1 v out2 v out2 02753-018 figure 18. break-before-make time delay v dd v ss v dd v ss v s in sd r s on off gnd v out v in v in adg611 adg612 v out q inj = c l v out v out c l 1nf 02753-019 figure 19. charge injection
adg611/adg612/adg613 rev. a | page 12 of 16 v out r l 50 ? in gnd v in s d v dd v ss v dd v ss 50? network analyzer off isolation = 20 log v out v s 0.1f 0.1f 50 ? v s 02753-020 figure 20. off isolation r l 50 ? v dd v ss v dd v ss 50? 0.1f 0.1f v s gnd vin2 s d s d nc v out vin1 channel-to-channel crosstalk = 20 log |v s /v out | 02753-021 figure 21. channel-to-channel crosstalk v out r l 50 ? in gnd v in s d v dd v ss v dd v ss network analyzer insertion loss = 20 log v out with switch v out without switch 0.1f 0.1f 50 ? v s 02753-022 figure 22. bandwidth
adg611/adg612/adg613 rev. a | page 13 of 16 applications information figure 23 illustrates a photodetector circuit with programmable gain. with the resistor values shown in this figure, gains in the range of 2 to 16 can be achieved by using different combinations of switches. r1 33k ? r2 510k ? r4 240k ? r5 240k ? r6 120k ? r7 120k ? r8 120k ? r3 510k ? r9 120k ? r9 120k ? s1 d1 s2 d2 s3 d3 s4 d4 gnd c1 2.5v d1 5v v out 5v 2.5v gain range: 2 to 16 (lsb) in1 in2 in3 ( msb) in4 02753-023 figure 23. photodetector circuit with programmable gain
adg611/adg612/adg613 rev. a | page 14 of 16 outline dimensions 16 9 8 1 pin 1 seating plane 8 0 4.50 4.40 4.30 6.40 bsc 5.10 5.00 4.90 0.65 bsc 0.15 0.05 1.20 max 0.20 0.09 0.75 0.60 0.45 0.30 0.19 coplanarity 0.10 compliant to jedec standards mo-153-ab figure 24. 16-lead thin shrink small outline package [tssop] (ru-16) dimensions shown in millimeters controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design. compliant to jedec standards ms-012-ac 10.00 (0.3937) 9.80 (0.3858) 16 9 8 1 6.20 (0.2441) 5.80 (0.2283) 4.00 (0.1575) 3.80 (0.1496) 1.27 (0.0500) bsc seating plane 0.25 (0.0098) 0.10 (0.0039) 0.51 (0.0201) 0.31 (0.0122) 1.75 (0.0689) 1.35 (0.0531) 0.50 (0.0197) 0.25 (0.0098) 1.27 (0.0500) 0.40 (0.0157) 0.25 (0.0098) 0.17 (0.0067) coplanarity 0.10 8 0 060606-a 45 figure 25. 16-lead standard small outline package [soic_n] narrow body (r-16) dimensions shown in millimeters and (inches) ordering guide model temperature range package description package option adg611yruz 1 ?40c to +125c 16-lead thin shrink small outline package [tssop] ru-16 adg611yruz-reel 1 ?40c to +125c 16-lead thin shrink small outline package [tssop] ru-16 adg611yruz-reel7 1 ?40c to +125c 16-lead thin shrink small outline package [tssop] ru-16 adg611yrz 1 ?40c to +125c 16-lead standard small outline package [soic_n] r-16 adg612yruz 1 ?40c to +125c 16-lead thin shrink small outline package [tssop] ru-16 adg612yruz-reel 1 ?40c to +125c 16-lead thin shrink small outline package [tssop] ru-16 ADG612YRUZ-REEL7 1 ?40c to +125c 16-lead thin shrink small outline package [tssop] ru-16 adg612wruz-reel 1 ?40c to +125c 16-lead thin shrink small outline package [tssop] ru-16 adg613yruz 1 ?40c to +125c 16-lead thin shrink small outline package [tssop] ru-16 adg613yruz-reel 1 ?40c to +125c 16-lead thin shrink small outline package [tssop] ru-16 adg613yruz-reel7 1 ?40c to +125c 16-lead thin shrink small outline package [tssop] ru-16 1 z = rohs compliant part.
adg611/adg612/adg613 rev. a | page 15 of 16 notes
adg611/adg612/adg613 rev. a | page 16 of 16 notes ?2002C2009 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. d02753-0-11/09(a)

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